1. Field of the Invention
The present invention relates generally to the processing, fabrication and usage of semiconductor chips and wafers. More specifically, the present invention applies a thermally conductive protective film or layer to the backside surface of a semiconductor wafer prior to a subsequent dicing operation performed on the wafer to singulate the wafer into diced semiconductor chips, during which the thin thermally conductive film minimizes and prevents chipping and cracking damage to the wafer and diced chips. During subsequent electrical operation of a diced chip, the thin thermally conductive film functions as a thermal conductor to dissipate and conduct away to a heat sink any heat generated during operation of the chip
After the fabrication of integrated circuits on a wafer, the wafer is diced by a sawing operation, during which the edges of the chips are subject to damage by chipping or cracking. Pursuant to the present invention, a thin film or layer of a thermally conductive material, such as a metal filled epoxy, is applied to the backside of a silicon wafer prior to a dicing operation. The thin film or layer prevents any chipped or cracked silicon from breaking off dies that are diced from the wafer, and also functions as a thermal conductor to conduct away and dissipate any heat generated during subsequent electrical operation of the chips.
2. Discussion of the Prior Art
As is well known in the semiconductor industry, a chip is a miniaturized electronic circuit that is mass-produced, generally along with a large number of other chips on a fabricated wafer of a semiconductor material such as silicon. The electronic circuits on a chip typically include transistors and other electronic and electrical components. State of the art manufacturing techniques are now capable of generating millions of components on a chip smaller than a fingertip. Each wafer is typically fabricated with a large number of chips, and after fabrication, the wafer is diced or cut to singulate the wafer into separate individual dies having individual chips thereon.
In a typical prior art dicing operation, a semiconductor wafer is supported by a tape applied to the backside of the semiconductor wafer that is opposite to the device or active side of the semiconductor wafer. The backside tape is supported by an outer metal hoop frame, with the wafer being suspended on the backside tape generally in the center of the metal hoop frame. The dicing saw generally can comprise a diamond wheel having a thickness of approximately 70 microns and a V shaped circumferential cutting edge. A full thickness semiconductor wafer may be diced or cut by several successively deeper cuts or passes through the full thickness wafer. The dicing operation is generally performed from the device side of the wafer through to the backside of the wafer because the dicing cutting wheel can cause chipping and cracking damage to the backside (far) surface of the wafer, particularly during the last cutting pass through the backside of the wafer and partially into the backside tape. Accordingly, it is desirable to have any damage caused by the dicing saw to be to the backside of the semiconductor wafer rather than to the device or active side of the semiconductor wafer.
The thickness of the wafer is also a factor in the amount of damage caused to the wafer during the dicing operation, and each pass of the dicing cutting wheel creates cracks and chips in the wafer. The wafer is diced and singulated into a plurality of individual dies still supported on the backside tape, and the good dies are then identified and are picked off and separated from the backside tape by a picking tool, frequently operated with the assistance of a vacuum for removal of the separated good dies. Speed is an important consideration in performing the dicing operation, the picking operation, and any subsequent packaging and shipping operations. The good dies are frequently packaged in a slotted carrier container, and the picking and shipping operations can also cause additional cracking and chipping of the silicon of the separated good dies.
The chipping and cracking of silicon at the backside surface of semiconductor chips has been a continuing, ongoing problem during dicing operations performed on full thickness semiconductor wafers. Possible solutions to alleviate the chipping and cracking problems have included the use of different dicing saws, different dicing conditions, backside processes and the application of dicing tapes, and the solutions have helped alleviate the problems to some extent. However, the solutions have not totally alleviated the chipping and cracking problems that occur during dicing, picking and shipping operations performed on the chips.
The prior art has disclosed the application of a thin film to a wafer backside prior to a dicing operation to minimize and prevent chipping and cracking damage to the wafer and chips during the dicing operation. However, the prior art has not appreciated that the same thin film can also function as a thermal conductor to conduct away and dissipate any heat generated by the chip during subsequent electrical operation of the chip.